Friday, 4 August 2017

Basic things to know about ASIC VLSI Back-end

  • Required tools sets for VLSI Back-end.
  • Synthesis:
    • Design Compile
    • Fusion compile
    • RTL Compiler
  • DFT (Design For Test)
    • DFT Max
    • RTL Compiler
  • Floor Planning
    • Jupiter-XT
    • SOC-Encounter-Nano Place
    • Innovus 
  • Partitioning
    • Jupiter-XT
    • SOC-Encounter-First Encounter
    • Innovus 
  • Power Planning
    • Jupiter-XT, Primetime
    • SOC-Encounter-First Encounter
    • Innovus 
    • ICC2/Fusion compile 
  • Placement
    • Jupiter-XT, Astro
    • SOC-Encounter-First Encounter
    • ICC2/Fusion compile 
  •  Clock Tree Synthesis
    • Jupiter-XT
    • SOC-Encounter-First Encounter
    • ICC2/Fusion compile 
  • Routing
    • Jupiter-XT
    • SOC-Encounter-Nano Place
    • ICC2/Fusion compile 
  • Power Verification (Out GDS-II)
    •  Herculis
    • Assura
    • ICC2/Fusion compile 
Physical Design Flow with i/o+ tools

 


Synthesis & Optimization
  1. RTL goes through optimization 

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